In the manufacture of silicon integrated circuits used in the construction of dynamic random access memories (DRAMs), static random access memories (SRAMs), and the like, certain types of multi-level conductor (MLC) interconnects are required to provide the necessary electrical paths between MOS transistors and other devices fabricated in the silicon substrate and the external circuitry used for passing data to and from these devices. As the device packing density for these integrated circuits is increased in accordance with the corresponding increased demands on function and performance of the integrated circuit chip, it becomes necessary to optimize and maximize the conformality of the various deposited layers of materials used in building up the completed integrated circuit structure from the surface of the silicon substrate to the top layer or layers of conductor thereof. This demand for increased layer conformality is not only related to an improved overall component packing density, but it is also related to improving the overall reliability and performance of the various electrical conductors which form the required electrical paths within the integrated circuit chip.
The term "conformality" as used herein refers to the degree to which a deposited layer conforms to the exact surface contour of the underlying surface on which the deposited layer is formed. Thus, when depositing layers of metal on a silicon substrate in which openings have been etched in either a surface mask layer or the silicon substrate itself, or both, then a high degree of deposited layer conformality means that not only must the deposited metal layers conform to the horizontal upper and lower boundaries of these openings, but it must conform to the vertical sidewalls of these openings as well.
One of the preferred conductors used in manufacturing multi-level conductor interconnects is titanium nitride, TiN, which has been widely used in many diverse arts including the manufacture of integrated circuits. Titanium nitride displays an interesting combination of properties, such as optical properties that resemble those of gold and a hardness greater than all elemental metals and sapphire and almost as hard as diamond. Its melting point is almost 3000.degree. C., which is higher than that of most materials, and it is inert to most chemicals and solvents except aqua regia which dissolves it slowly, and hydrogen fluoride (HF). In addition, titanium atoms at the silicon substrate interface form a thin layer of titanium silicide, TiS.sub.2, which makes a good low resistance contact at the surface of a silicon substrate. Titanium nitride used in the manufacture of certain types of integrated circuits is disclosed in co-pending application Ser. No. 07/734,708 of Fernando Gonzalez et al, filed on Jul. 24, 1991, and in co-pending application Ser. No. 07/785,681 of Gertej S. Sandhu, filed Oct. 31, 1991, now U.S. Pat. No. 5,227,334, both assigned to the present assignee and incorporated herein by reference.
Known currently used prior art processes for forming titanium, titanium nitride, and titanium oxide films include either the use of sputtering techniques to form the titanium and titanium nitride films or the use of chemical vapor deposition (CVD) techniques to form these films. Current high density integrated circuit applications utilize very high aspect ratio contact holes and trenches which can be greater than 3:1. Consequently, prior art techniques for forming titanium, titanium nitride, and titanium oxide are not acceptable for the more advanced IC devices being built today. Sputtering processes have tended to produce very poor step coverage for these coatings, whereas CVD TiN forming techniques tend to involve the production of high contaminant levels of either chlorine or carbon or oxygen which in turn can cause various electrical problems within the integrated circuit structures being produced.